Invention Grant
- Patent Title: Pattern placement error compensation layer
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Application No.: US14939251Application Date: 2015-11-12
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Publication No.: US09704807B2Publication Date: 2017-07-11
- Inventor: Deniz E. Civay , Erik R. Hosler
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L23/535
- IPC: H01L23/535 ; H01L21/768 ; H01L23/532

Abstract:
A method includes forming a first conductive feature positioned in a first dielectric layer. A conductive polymer layer is formed above the first dielectric layer and the first conductive feature. The conductive polymer layer has a conductive path length. A second dielectric layer is formed above the first dielectric layer. A first via opening is formed in the second dielectric layer and the conductive polymer layer to expose the first conductive feature. A conductive via is formed in the first via opening. The conductive via contacts the first conductive feature and the conductive polymer layer.
Public/Granted literature
- US20170141035A1 PATTERN PLACEMENT ERROR COMPENSATION LAYER Public/Granted day:2017-05-18
Information query
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