A chip package includes a chip, a laser stopper, an isolation layer, a redistribution layer, an insulating layer, and a conductive structure. The chip has a conductive pad, a first surface, and a second surface. The conductive pad is located on the first surface. The second surface has a first through hole to expose the conductive pad. The laser stopper is located on the conductive pad in the first through hole. The isolation layer is located on the second surface and in the first through hole. The isolation layer has a third surface opposite to the second surface, and has a second through hole to expose the laser stopper. The redistribution layer is located on the third surface, a sidewall of the second through hole, and the laser stopper in the second through hole. The conductive structure is located on the redistribution.