Invention Grant
- Patent Title: Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods
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Application No.: US14862712Application Date: 2015-09-23
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Publication No.: US09741452B2Publication Date: 2017-08-22
- Inventor: Francois Ibrahim Atallah , Keith Alan Bowman , David Joseph Winston Hansquine , Jihoon Jeong , Hoan Huu Nguyen
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: W&T/Qualcomm
- Main IPC: G11C29/52
- IPC: G11C29/52 ; G11C11/419 ; G11C11/00 ; G11C11/412 ; G11C11/418

Abstract:
Read-assist circuits for memory bit cells employing a P-type Field-Effect Transistor (PFET) read port(s) are disclosed. Related memory systems and methods are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type FET (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide memory bit cells having PFET read ports, as opposed to NFET read ports, to increase memory read times to the memory bit cells, and thus improve memory read performance. To mitigate or avoid a read disturb condition that could otherwise occur when reading the memory bit cell, read-assist circuits are provided for memory bit cells having PFET read ports.
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