Invention Grant
- Patent Title: Methods of forming a contact structure for a vertical channel semiconductor device and the resulting device
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Application No.: US14953874Application Date: 2015-11-30
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Publication No.: US09741847B2Publication Date: 2017-08-22
- Inventor: Bartlomiej Jan Pawlak
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L29/66 ; H01L29/06 ; H01L21/761 ; H01L29/45 ; H01L29/417 ; H01L29/423 ; H01L21/265

Abstract:
One illustrative method disclosed includes, among other things, forming a vertically oriented semiconductor structure above a doped well region defined in a semiconductor substrate, the semiconductor structure comprising a lower source/drain region and an upper source/drain region, wherein the lower source/drain region physically contacts the upper surface of the substrate, forming a counter-doped isolation region in the substrate, forming a metal silicide region in the substrate above the counter-doped isolation region, wherein the metal silicide region is in physical contact with the lower source/drain region, and forming a lower source/drain contact structure that is conductively coupled to the metal silicide region.
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