Systems and methods are disclosed for a hybrid parallel-serial memory access by a system on chip (SoC). The SoC is electrically coupled to the memory by both a parallel access channel and a separate serial access channel. A request for access to the memory is received. In response to receiving the request to access the memory, a type of memory access is identified. A determination is then made whether to access the memory with the serial access channel. In response to the determination to access the memory with the serial access channel, a first portion of the memory is accessed with the parallel access channel, and a second portion of the memory is accessed with the serial access channel.