Invention Grant
- Patent Title: Preventing malicious instruction execution
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Application No.: US14936266Application Date: 2015-11-09
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Publication No.: US09747442B2Publication Date: 2017-08-29
- Inventor: Xiaoning Li , William Wager , Nathan Bixler
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G06F21/55
- IPC: G06F21/55 ; G06F21/56 ; G06F21/84 ; G06F21/52 ; G06T1/20 ; G06T1/60

Abstract:
Systems and techniques for preventing malicious instruction execution are described herein. A first instance of an instruction for a graphics processing unit (GPU) may be received. The instruction may be placed in a target list. A notification that the instruction caused a problem with the GPU may be received. The instruction may be moved from the target list to a black list in response to the notification. A second instance of the instruction may be received. The second instance of the instruction may be prevented from executing on the GPU in response to the instruction being on the black list.
Public/Granted literature
- US20160063246A1 PREVENTING MALICIOUS INSTRUCTION EXECUTION Public/Granted day:2016-03-03
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