Invention Grant
- Patent Title: Structure for relaxed SiGe buffers including method and apparatus for forming
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Application No.: US15210030Application Date: 2016-07-14
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Publication No.: US09752224B2Publication Date: 2017-09-05
- Inventor: Zhiyuan Ye , Errol Antonio C. Sanchez , Keun-Yong Ban , Xinyu Bao
- Applicant: Applied Materials, Inc.
- Applicant Address: US CA Santa Clara
- Assignee: APPLIED MATERIALS, INC.
- Current Assignee: APPLIED MATERIALS, INC.
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson + Sheridan LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; C23C8/02

Abstract:
Embodiments of the present disclosures provide methods and apparatus for manufacturing semiconductor devices such as transistors used for amplifying or switching electronic signals. Specifically, embodiments of the present disclosure generally relate to a semiconductor device having a film stack including an interlayer of semiconductor material and a buffer layer of semiconductor material underneath an active device layer. In various embodiments, the interlayer may include group III-V semiconductor materials formed between a first surface of a silicon-based substrate and the buffer layer. In certain embodiments the buffer layer may comprise group IV semiconductor materials. The interlayer may have a lattice constant designed to mitigate lattice mismatch between the group IV buffer layer and the silicon-based substrate. The buffer layer may provide improved integration of the active device layer to improve the performance of the resulting device.
Public/Granted literature
- US20170040421A1 STRUCTURE FOR RELAXED SIGE BUFFERS INCLUDING METHOD AND APPARATUS FOR FORMING Public/Granted day:2017-02-09
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