Invention Grant
- Patent Title: Method of checking the layout integrity
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Application No.: US14665242Application Date: 2015-03-23
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Publication No.: US09754067B2Publication Date: 2017-09-05
- Inventor: John J. Ellis-Monaghan , Bertrand Gabillard , Phillippe Hauviller , Michel Rivier
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Michael LeStrange
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Checking the layout integrity includes the steps of receiving inputs defining a plurality of devices for a layout, generating a signature for each device in the layout, when created, from one or more parameters of the device, storing the generated signatures with the layout, receiving the stored layout and signatures, regenerating each signature for each device in the stored layout, and comparing each regenerated signature with the corresponding stored signature.
Public/Granted literature
- US20150347667A1 METHOD OF CHECKING THE LAYOUT INTEGRITY Public/Granted day:2015-12-03
Information query