公开(公告)号：US09754067B2

公开(公告)日：2017-09-05

申请号：US14665242

申请日：2015-03-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： John J. Ellis-Monaghan ,  Bertrand Gabillard ,  Phillippe Hauviller ,  Michel Rivier

IPC: G06F17/50

CPC classification number: G06F17/5081

Abstract: Checking the layout integrity includes the steps of receiving inputs defining a plurality of devices for a layout, generating a signature for each device in the layout, when created, from one or more parameters of the device, storing the generated signatures with the layout, receiving the stored layout and signatures, regenerating each signature for each device in the stored layout, and comparing each regenerated signature with the corresponding stored signature.