Invention Grant
- Patent Title: Semiconductor device and method of forming TSV semiconductor wafer with embedded semiconductor die
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Application No.: US13936099Application Date: 2013-07-05
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Publication No.: US09754858B2Publication Date: 2017-09-05
- Inventor: Reza A. Pagaila , Yaojian Lin , Seung Uk Yoon
- Applicant: STATS ChipPAC, Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Atkins and Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/56 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L23/00 ; H01L25/065 ; H01L25/10

Abstract:
A semiconductor device has a TSV semiconductor wafer with a cavity formed in a first surface of the wafer. A second cavity can be formed in a second surface of the wafer. A plurality of semiconductor die is mounted within the cavities. The semiconductor die can be mounted side-by-side and/or stacked within the cavity. Conductive TSV can be formed through the die. An encapsulant is deposited within the cavity over the die. A CTE of the die is similar to a CTE of the encapsulant. A first interconnect structure is formed over a first surface of the encapsulant and wafer. A second interconnect structure is formed over a second surface of the encapsulant and wafer. The first and second interconnect structure are electrically connected to the TSV wafer. A second semiconductor die can be mounted over the first interconnect structure with encapsulant deposited over the second die.
Public/Granted literature
- US20130292851A1 Semiconductor Device and Method of Forming TSV Semiconductor Wafer with Embedded Semiconductor Die Public/Granted day:2013-11-07
Information query
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