Invention Grant
- Patent Title: Charge storage apparatus and methods
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Application No.: US14987370Application Date: 2016-01-04
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Publication No.: US09754953B2Publication Date: 2017-09-05
- Inventor: Sanh D. Tang , John K. Zahurak
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/11556 ; H01L29/792 ; H01L21/28 ; H01L27/11582 ; H01L27/11578 ; H01L27/11524 ; H01L27/11521 ; H01L29/04 ; H01L29/167 ; H01L29/49
Abstract:
Methods of forming multi-tiered semiconductor devices are described, along with apparatus and systems that include them. In one such method, an opening is formed in a tier of semiconductor material and a tier of dielectric. A portion of the tier of semiconductor material exposed by the opening is processed so that the portion is doped differently than the remaining semiconductor material in the tier. At least substantially all of the remaining semiconductor material of the tier is removed, leaving the differently doped portion of the tier of semiconductor material as a charge storage structure. A tunneling dielectric is formed on a first surface of the charge storage structure and an intergate dielectric is formed on a second surface of the charge storage structure. Additional embodiments are also described.
Public/Granted literature
- US20160118392A1 CHARGE STORAGE APPARATUS AND METHODS Public/Granted day:2016-04-28
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