Invention Grant
- Patent Title: Stud bump structure for semiconductor package assemblies
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Application No.: US13460412Application Date: 2012-04-30
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Publication No.: US09768137B2Publication Date: 2017-09-19
- Inventor: Meng-Tse Chen , Hsiu-Jen Lin , Chih-Wei Lin , Cheng-Ting Chen , Ming-Da Cheng , Chung-Shi Liu
- Applicant: Meng-Tse Chen , Hsiu-Jen Lin , Chih-Wei Lin , Cheng-Ting Chen , Ming-Da Cheng , Chung-Shi Liu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/498 ; H01L25/10 ; H01L21/48 ; H01L23/367
Abstract:
A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.
Public/Granted literature
- US20130285238A1 STUD BUMP STRUCTURE FOR SEMICONDUCTOR PACKAGE ASSEMBLIES Public/Granted day:2013-10-31
Information query
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