- Patent Title: Semiconductor package with partial plating on contact side surfaces
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Application No.: US14706864Application Date: 2015-05-07
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Publication No.: US09773722B1Publication Date: 2017-09-26
- Inventor: Somchai Nondhasitthichai , Saravuth Sirinorakul , Woraya Benjavasukul
- Applicant: UTAC Headquarters PTE, LTD.
- Applicant Address: SG Singapore
- Assignee: UTAC HEADQUARTERS PTE. LTD.
- Current Assignee: UTAC HEADQUARTERS PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Haverstock & Owens LLP
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/31

Abstract:
Embodiments of the present invention are directed to a semiconductor package with partial plating on contact surfaces. The semiconductor package includes a top surface, a bottom surface that is opposite the top surface, and side surfaces between the top surface and the bottom surface. Each of the side surfaces includes a step such that the area of the bottom surface is smaller than the area of the top surface. The semiconductor package includes a plurality of contacts that is located at peripheral edges of the bottom surface. Each of the plurality of contacts includes a first surface that is flush with the bottom surface, a second surface that is flush with one of the side surfaces, and a curved surface located at a corresponding step. In some embodiments, the first surface and the curved surface are plated, while the second surface is exposed (not plated).
Information query
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