- 专利标题： Layout and timing schemes for ping-pong readout architecture
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申请号： US14989067申请日： 2016-01-06
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公开(公告)号： US09787928B2公开(公告)日： 2017-10-10
- 发明人: Dexue Zhang , Yingying Wang , Loc Truong , Steven Huang
- 申请人： Forza Silicon Corporation
- 申请人地址： US CA Pasadena
- 专利权人： Forza Silicon Corporation
- 当前专利权人： Forza Silicon Corporation
- 当前专利权人地址： US CA Pasadena
- 代理机构： Mountain IP, PLLC
- 主分类号： H04N5/378
- IPC分类号： H04N5/378 ; H04N5/357 ; H04N5/374 ; H01L27/146
摘要：
Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.
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