Invention Grant
- Patent Title: Mitigating busy time in a high performance cache
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Application No.: US14847319Application Date: 2015-09-08
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Publication No.: US09792213B2Publication Date: 2017-10-17
- Inventor: Deanna P. Berger , Michael F. Fee , Christine C. Jones , Arthur J. O'Neill , Diana L. Orf , Robert J. Sonnelitter, III
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Fleit Gibbons Gutman Bongini Bianco PL
- Agent Thomas S. Grzesik
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/0855 ; G06F12/0846 ; G06F12/084

Abstract:
Various embodiments mitigate busy time in a hierarchical store-through memory cache structure including a cache directory associated with a memory cache. The cache directory is divided into a plurality of portions each associated with a portion of memory cache. A determination is made that a first subpipe of a shared cache pipeline comprises a non-store request. The shared pipeline is communicatively coupled to the plurality of portions of the cache directory. A store command is prevented from being placed in a second subpipe of the shared cache pipeline based on determining that a first subpipe of the shared cache pipeline comprises a non-store request. Simultaneous cache lookup operations are supported between the plurality of portions of the cache directory and cache write operations. Two or more store commands simultaneously processed in a shared cache pipeline communicatively coupled to the plurality of portions of the cache directory.
Public/Granted literature
- US20150378916A1 MITIGATING BUSY TIME IN A HIGH PERFORMANCE CACHE Public/Granted day:2015-12-31
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