Invention Grant
- Patent Title: Methods of detecting stresses, methods of training compact models, methods of relaxing stresses, and computing systems
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Application No.: US14688440Application Date: 2015-04-16
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Publication No.: US09798849B2Publication Date: 2017-10-24
- Inventor: Jae-Pil Shin , Chang-Woo Kang , Jong-Won Kim , Ho-Joon Lee , Kyu-Baik Chang , Won-Young Chung
- Applicant: Jae-Pil Shin , Chang-Woo Kang , Jong-Won Kim , Ho-Joon Lee , Kyu-Baik Chang , Won-Young Chung
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG EELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG EELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, PLC
- Priority: KR10-2014-0085953 20140709
- Main IPC: G06F9/455
- IPC: G06F9/455 ; G06F17/50

Abstract:
A method of detecting stress of an integrated circuit including first and second patterns formed from different materials may comprise: determining one or more stress detection points of the first pattern; dividing a region including a first stress detection point of the one or more stress detection points into a plurality of divided regions; calculating areas of the second pattern at the divided regions; and/or detecting a stress level applied to the first stress detection point of the first pattern by the second pattern based on the areas of the second pattern at the divided regions.
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