- 专利标题: System and method for clock spur artifact correction
-
申请号: US14884578申请日: 2015-10-15
-
公开(公告)号: US09806919B2公开(公告)日: 2017-10-31
- 发明人: Pallab Midya , Hong Jiang
- 申请人: Futurewei Technologies, Inc.
- 申请人地址: US TX Plano
- 专利权人: FUTUREWEI TECHNOLOGIES, INC.
- 当前专利权人: FUTUREWEI TECHNOLOGIES, INC.
- 当前专利权人地址: US TX Plano
- 代理机构: Slater Matsil, LLP
- 主分类号: H04K1/02
- IPC分类号: H04K1/02 ; H04L25/03 ; H04L25/49 ; H04L25/06
摘要:
A method for clock spur artifact correction includes obtaining a plurality of switching stage input signals generated in accordance with an input signal level of an external amplifier, and adjusting the plurality of switching stage input signals such that a clock spur harmonic artifact is reduced. The clock spur harmonic artifact includes a first clock spur harmonic artifact generated in a plurality of external signal paths including external switching stages, and the adjusting the plurality of switching stage input signals includes one of: adjusting a duty ratio of one of the plurality of switching stage input signals in accordance with a gain mismatch between two of the external signal paths; and injecting a first Continuous Wave (CW) signal into the plurality of switching stage input signals in accordance with a previous amplitude of the first clock spur harmonic artifact.
公开/授权文献
- US20170111191A1 System and Method for Clock Spur Artifact Correction 公开/授权日:2017-04-20
信息查询