- 专利标题: Interconnect structure and method of manufacturing the same
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申请号: US15016147申请日: 2016-02-04
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公开(公告)号: US09807867B2公开(公告)日: 2017-10-31
- 发明人: Jiun-Yi Wu , Chien-Hsun Lee , Chewn-Pu Jou , Fu-Lung Hsueh
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Maschoff Brennan
- 主分类号: H05K1/02
- IPC分类号: H05K1/02 ; H01L21/48 ; H01L23/498 ; H01L23/552 ; H05K3/00 ; H05K3/42 ; H05K3/40 ; H05K1/11
摘要:
A method for manufacturing an interconnect structure and an interconnect structure are provided. The method includes: forming an opening in a substrate; forming a low-k dielectric block in the opening; forming at least one via in the low-k dielectric block; and forming a conductor in the via. The interconnect structure includes a substrate, a dielectric block, and a conductor. The substrate has an opening therein. The dielectric block is present in the opening of the substrate. The dielectric block has at least one via therein. The dielectric block has a dielectric constant smaller than that of the substrate. The conductor is present in the via of the dielectric block.
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