- 专利标题: Buried bus and related method
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申请号: US14955299申请日: 2015-12-01
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公开(公告)号: US09812538B2公开(公告)日: 2017-11-07
- 发明人: Hugo Burke , Ling Ma
- 申请人: Infineon Technologies Americas Corp.
- 申请人地址: US CA El Segundo
- 专利权人: Infineon Technologies Americas Corp.
- 当前专利权人: Infineon Technologies Americas Corp.
- 当前专利权人地址: US CA El Segundo
- 代理机构: Murphy, Bilak & Homiller, PLLC
- 主分类号: H01L29/423
- IPC分类号: H01L29/423 ; H01L29/49 ; H01L21/768 ; H01L29/78
摘要:
A semiconductor structure includes a semiconductor substrate having a gate electrode in a gate trench, a buried bus in the semiconductor substrate, the buried bus having a bus conductive filler in a bus trench, where the bus conductive filler is electrically coupled to the gate electrode. The bus conductive filler is surrounded by the gate electrode. The gate trench intersects the bus trench in the semiconductor substrate. The gate electrode includes polysilicon. The bus conductive filler includes tungsten. The semiconductor structure also includes an adhesion promotion layer interposed between the bus conductive filler and the gate electrode, where the adhesion promotion layer includes titanium and titanium nitride. The semiconductor structure also includes a dielectric layer covering the gate electrode over the semiconductor substrate, where the buried bus has a coplanar top surface with the dielectric layer.
公开/授权文献
- US20170154970A1 Buried Bus and Related Method 公开/授权日:2017-06-01
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