Invention Grant
- Patent Title: Forming stressed epitaxial layers between gates separated by different pitches
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Application No.: US14879220Application Date: 2015-10-09
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Publication No.: US09818873B2Publication Date: 2017-11-14
- Inventor: Emre Alptekin , Lars W. Liebmann , Injo Ok , Balasubramanian Pranatharthiharan , Ravikumar Ramachandran , Soon-Cheon Seo , Charan V. V. S. Surisetty , Mickey H. Yu
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Yuanmin Cai
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L29/78 ; H01L27/088 ; H01L21/8234 ; H01L29/66 ; H01L21/3213

Abstract:
Various embodiments include methods and integrated circuit structures. In some cases, a method of forming an integrated circuit structure can include: forming a doped silicon layer over a substrate; forming a plurality of fin structures from the doped silicon layer; forming a plurality of gate structures over the plurality of fin structures, each of the plurality of gate structures separated from a neighboring gate structure by a first pitch; forming a mask over the plurality of gate structures, exposing at least one of the plurality of gate structures; removing the at least one of the plurality of gate structures, wherein two of the remaining gate structures after the removing are separated by a second pitch larger than the first pitch; and forming an epitaxial region over the substrate between the two of the remaining gate structures.
Public/Granted literature
- US20170104100A1 FORMING STRESSED EPITAXIAL LAYER USING DUMMY GATES Public/Granted day:2017-04-13
Information query
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