Invention Grant
- Patent Title: Methods of manufacturing semiconductor devices using alignment marks to align layers
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Application No.: US14736455Application Date: 2015-06-11
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Publication No.: US09831186B2Publication Date: 2017-11-28
- Inventor: Ki-hyun Park , Byoung-ho Kwon , Dong-chan Kim , Choong-seob Shin , Jong-su Kim , Bo-un Yoon
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2014-0095002 20140725
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L23/544 ; H01L21/4757 ; H01L21/768

Abstract:
A method of manufacturing a semiconductor device includes forming a first alignment mark trench in a first material layer on a substrate. A first alignment mark via may then be formed by etching a second material layer that is underneath the first material layer, where the first alignment mark via is positioned to communicate with the first alignment mark trench. Then, a trench-via-merged-type first alignment mark may be formed by filling the first alignment mark trench and the first alignment mark via with a light reflection material layer.
Public/Granted literature
- US20160027739A1 METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING ALIGNMENT MARKS TO ALIGN LAYERS Public/Granted day:2016-01-28
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