- 专利标题: Background flash offset calibration in continuous-time delta-sigma ADCS
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申请号: US15460433申请日: 2017-03-16
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公开(公告)号: US09843337B1公开(公告)日: 2017-12-12
- 发明人: Zhao Li , Trevor Clifford Caldwell , David Nelson Alldred , Yunzhi Dong , Prawal Man Shrestha , Jialin Zhao , Hajime Shibata , Victor Kozlov , Richard E. Schreier , Wenhua W. Yang
- 申请人: Analog Devices Global
- 申请人地址: BM Hamilton
- 专利权人: ANALOG DEVICES GLOBAL
- 当前专利权人: ANALOG DEVICES GLOBAL
- 当前专利权人地址: BM Hamilton
- 代理机构: Patent Capital Group
- 主分类号: H03M1/12
- IPC分类号: H03M1/12 ; H03M1/10 ; H03M3/00
摘要:
Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.
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