Invention Grant
- Patent Title: CMOS-compatible polycide fuse structure and method of fabricating same
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Application No.: US14780222Application Date: 2013-06-25
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Publication No.: US09881927B2Publication Date: 2018-01-30
- Inventor: Jeng-Ya D. Yeh , Chia-Hong Jan , Walid M. Hafez , Joodong Park
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- International Application: PCT/US2013/047626 WO 20130625
- International Announcement: WO2014/209285 WO 20141231
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/092 ; H01L27/112 ; H01L29/66 ; H01L23/525 ; H01L21/8234 ; H01L27/088
Abstract:
CMOS-compatible polycide fuse structures and methods of fabricating CMOS-compatible polycide fuse structures are described. In an example, a semiconductor structure includes a substrate. A polycide fuse structure is disposed above the substrate and includes silicon and a metal. A metal oxide semiconductor (MOS) transistor structure is disposed above the substrate and includes a metal gate electrode.
Public/Granted literature
- US20160056162A1 CMOS-COMPATIBLE POLYCIDE FUSE STRUCTURE AND METHOD OF FABRICATING SAME Public/Granted day:2016-02-25
Information query
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