Invention Grant
- Patent Title: Vertical conduction integrated electronic device protected against the latch-up and relating manufacturing process
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Application No.: US15606472Application Date: 2017-05-26
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Publication No.: US09882045B2Publication Date: 2018-01-30
- Inventor: Davide Giuseppe Patti , Antonio Giuseppe Grimaldi
- Applicant: STMICROELECTRONICS S.R.L.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed IP Law Group LLP
- Priority: IT102015000056996 20150930
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L21/8234 ; H01L29/06 ; H01L29/423 ; H01L29/10
Abstract:
A vertical conduction integrated electronic device including: a semiconductor body; a trench that extends through part of the semiconductor body and delimits a portion of the semiconductor body, which forms a first conduction region having a first type of conductivity and a body region having a second type of conductivity, which overlies the first conduction region; a gate region of conductive material, which extends within the trench; an insulation region of dielectric material, which extends within the trench and is arranged between the gate region and the body region; and a second conduction region, which overlies the body region. The second conduction region is formed by a conductor.
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