Invention Grant
- Patent Title: Speed model tuning for programmable integrated circuits with consideration of device yield, simulated frequency of operation, and speed of device components
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Application No.: US14750049Application Date: 2015-06-25
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Publication No.: US09885750B1Publication Date: 2018-02-06
- Inventor: Nagaraj Savithri
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Joshua Hamberger; Keith Taboada
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G01R31/317 ; H03K19/177

Abstract:
Techniques for intelligent tuning of speed models for configurable integrated circuits. The techniques consider data related to yield, quality-of-results, and data for individual programmable-interconnect-point (PIP)-contexts. More specifically, the speed of yield-related structures, quality-of-results related structures, and structures for measuring individual PIP-contexts are measured. These measurements are compared with estimated values stored as part of a speed model and scaling factors for the stored estimated values are calculated. The scaling factors are applied to the estimated values within the speed model and measurements are repeated if desired.
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