- 专利标题: Offset calibration circuit and method for an amplifier circuit
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申请号: US15299527申请日: 2016-10-21
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公开(公告)号: US09893688B1公开(公告)日: 2018-02-13
- 发明人: Pavan Nallamothu
- 申请人: STMicroelectronics, Inc.
- 申请人地址: US TX Coppell
- 专利权人: STMicroelectronics, Inc.
- 当前专利权人: STMicroelectronics, Inc.
- 当前专利权人地址: US TX Coppell
- 代理机构: Gardere Wynne Sewell LLP
- 主分类号: H03F1/02
- IPC分类号: H03F1/02 ; H03F3/45 ; H03F1/34
摘要:
A differential amplifier has an inherent offset voltage. In many circuit applications, such as with a voltage to current converter circuit, it is important to nullify that offset voltage. A calibration circuit is provided to configured the differential amplifier to operate as a comparator with a common voltage applied to both inputs. The logic state of the output of the amplifier indicates whether the offset voltage is positive or negative. In response thereto, a trim current with a progressively increasing magnitude is injected into the amplifier and the amplifier output is monitored to detect a change in logic state. The magnitude of the trim current at the point where the logic state changes is the magnitude of trim current needed to nullify the voltage offset.
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