Invention Grant
- Patent Title: Framework for balancing robustness and latency during collection of statistics from soft reads
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Application No.: US15480638Application Date: 2017-04-06
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Publication No.: US09898209B2Publication Date: 2018-02-20
- Inventor: Sundararajan Sankaranarayanan , Erich F. Haratsch
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: SEAGATE TECHNOLOGY LLC
- Current Assignee: SEAGATE TECHNOLOGY LLC
- Current Assignee Address: US CA Cupertino
- Agency: Christopher P. Maiorana, PC
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
An apparatus includes a memory and a controller. The memory includes a plurality of memory devices. The controller may be coupled to the memory and configured to process a plurality of read/write operations to/from the memory, store data in the plurality of memory devices using units of super-blocks, and generate a number of unique weight statistics in a single read operation by reading a number of dies within a super-block with dissimilar read reference voltages. Each super-block generally includes a block from a die of each of the plurality of memory devices. The controller may be further configured to split the number of dies in each super-block into two sets and collect page weights for upper pages from one of the two sets and page weights for lower pages from the other of the two sets.
Public/Granted literature
- US20170212693A1 FRAMEWORK FOR BALANCING ROBUSTNESS AND LATENCY DURING COLLECTION OF STATISTICS FROM SOFT READS Public/Granted day:2017-07-27
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