Gate driving circuit and display panel
Abstract:
A gate driving circuit is disclosed. The output circuit is connected with the input circuit and the pulling circuit at a first node, responding to scanning driving signal of previous stage to set the pulling circuit in a first status, using a first reference voltage level to set the first node at a first voltage, and held. The output circuit outputs scanning driving signal of current stage according to a first clock signal. The stabilizing circuit is connected with the pulling circuit at a second node, using the first reference voltage level to set the second node at the first voltage, and held. The pulling control circuit responds to a second clock signal to set the pulling circuit in a second status, using a second reference voltage level to pull voltages of the first and second nodes and to hold the voltages. Accordingly, a current leakage can be reduced.
Public/Granted literature
Information query
Patent Agency Ranking
0/0