Invention Grant
- Patent Title: Processing system with a secure set of executable instructions and/or addressing scheme
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Application No.: US15600006Application Date: 2017-05-19
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Publication No.: US09916281B2Publication Date: 2018-03-13
- Inventor: Philippe Escalona
- Applicant: STMicroelectronics SA
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Slater Matsil, LLP
- Priority: FR1360126 20131017
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/40 ; G06F15/76 ; G06F21/00 ; G06F21/75

Abstract:
A method for securing a data processing system having a processing unit is disclosed. At least a group of N1 digital words of m1 bits is selected from among the set of M1 digital words. N1 is less than M1. These words are selected in such a way that each selected digital word differs from all the other selected digital words by a number of bits at least equal to an integer p which is at least equal to 2. The group of N1 digital words of m1 bits forms at least one group of N1 executable digital instructions. The processing unit is configured to make it capable of executing each instruction of the at least one group of N1 executable digital instructions.
Public/Granted literature
- US20170255591A1 Processing System with a Secure Set of Executable Instructions and/or Addressing Scheme Public/Granted day:2017-09-07
Information query