- Patent Title: Method and structure for protecting gates during epitaxial growth
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Application No.: US14309096Application Date: 2014-06-19
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Publication No.: US09941388B2Publication Date: 2018-04-10
- Inventor: Xiuyu Cai , Ying Hao Hsieh
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/78 ; H01L27/092 ; H01L21/8238 ; H01L29/165

Abstract:
Embodiments of the present invention provide methods and structures for protecting gates during epitaxial growth. An inner spacer of a first material is deposited adjacent a transistor gate. An outer spacer of a different material is deposited adjacent the inner spacer. Stressor cavities are formed adjacent the transistor gate. The inner spacer is recessed, forming a divot. The divot is filled with a material to protect the transistor gate. The stressor cavities are then filled. As the gate is safely protected, unwanted epitaxial growth (“mouse ears”) on the transistor gate is prevented.
Public/Granted literature
- US20150372108A1 METHOD AND STRUCTURE FOR PROTECTING GATES DURING EPITAXIAL GROWTH Public/Granted day:2015-12-24
Information query
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