A display device is disclosed. In one aspect, the device includes a substrate and a display unit disposed on the substrate and including a plurality of pixels each pixel including a thin film transistor, a display element electrically connected to the thin film transistor, and a planarization layer interposed between the thin film transistor and the display element. The display unit includes a display region and a non-display region surrounding the display region, wherein the non-display region includes a voltage line. The planarization layer comprises a central portion, an outer portion and a dividing region interposed between the central and outer portions, wherein the dividing region is located in the non-display region. The planarization layer covers at least a lateral side of the voltage line formed in the dividing region.