- 专利标题: Method for self-aligned solder reflow bonding and devices obtained thereof
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申请号: US15385653申请日: 2016-12-20
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公开(公告)号: US09978710B2公开(公告)日: 2018-05-22
- 发明人: Vikas Dubey , Eric Beyne , Jaber Derakhshandeh
- 申请人: IMEC VZW , Katholieke Universiteit Leuven
- 申请人地址: BE Leuven BE Leuven
- 专利权人: IMEC vzw,Katholieke Universiteit Leuven
- 当前专利权人: IMEC vzw,Katholieke Universiteit Leuven
- 当前专利权人地址: BE Leuven BE Leuven
- 代理机构: Knobbe Martens Olson & Bear LLP
- 优先权: EP15202661 20151224
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L23/498 ; H01L25/065 ; H01L25/00
摘要:
A method for producing a stack of semiconductor devices and the stacked device obtained thereof are disclosed. In one aspect, the method includes providing a first semiconductor device comprising a dielectric layer with a hole, the hole lined with a metal layer and partially filled with solder material. The method also includes providing a second semiconductor device with a compliant layer having a metal protrusion through the compliant layer, the protrusion capped with a capping layer. The method further includes mounting the devices by landing the metal protrusion in the hole, where the compliant layer is spaced from the dielectric layer. The method includes thereafter reflowing the solder material, thereby bonding the devices such that the compliant layer is contacting the dielectric layer.
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