Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US15065770Application Date: 2016-03-09
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Publication No.: US09984967B2Publication Date: 2018-05-29
- Inventor: Kai-Yu Cheng , Shih-Kang Tien , Ching-Kun Huang
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L21/768 ; H01L23/522 ; H01L23/532

Abstract:
A semiconductor structure includes a first dielectric layer, a first conductive via, a partial landing pad, a second dielectric layer, and a second conductive via. The first conductive via is disposed in the first dielectric layer. The partial landing pad is disposed on the first conductive via and the first dielectric layer, in which the partial landing pad has a top surface and a bottom surface, and the top surface of the partial landing pad has a width greater than or substantially equal to that of the bottom surface of the partial landing pad. The second dielectric layer is disposed on the partial landing pad. The second conductive via is disposed in the second dielectric layer and electrically connected to the partial landing pad.
Public/Granted literature
- US20170179021A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-06-22
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