Invention Grant
- Patent Title: Fabrication method of semiconductor package
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Application No.: US15632669Application Date: 2017-06-26
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Publication No.: US09991197B2Publication Date: 2018-06-05
- Inventor: Chia-Cheng Chen , Chi-Ching Ho , Shao-Tzu Tang , Yu-Che Liu , Ying-Chou Tsai
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW101136309A 20121002
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L23/498 ; H01L21/48 ; H01L21/56 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor package is provided, which includes: a dielectric layer made of a material used for fabricating built-up layer structures; a conductive trace layer formed on the dielectric layer; a semiconductor chip is mounted on and electrically connected to the conductive trace layer; and an encapsulant formed over the dielectric layer to encapsulate the semiconductor chip and the conductive trace layer. Since a strong bonding is formed between the dielectric layer and the conductive trace layer, the present invention can prevent delamination between the dielectric layer and the conductive trace layer from occurrence, thereby improving reliability and facilitating the package miniaturization by current fabrication methods.
Public/Granted literature
- US20170294372A1 FABRICATION METHOD OF SEMICONDUCTOR PACKAGE Public/Granted day:2017-10-12
Information query
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