ELECTRONIC PACKAGE HAVING REDISTRIBUTION STRUCTURE

    公开(公告)号:US20190043819A1

    公开(公告)日:2019-02-07

    申请号:US15869249

    申请日:2018-01-12

    IPC分类号: H01L23/00 H01L23/31 H01L21/56

    摘要: An electronic package is provided, including an electronic component, a redistribution structure formed on the electronic component, a plurality of conductive posts bonded to the redistribution structure, and a redistribution layer bonded to the conductive posts. As such, the electronic component that meets the requirement of miniaturization can be electrically connected to an electronic device through the redistribution structure, the conductive posts and the redistribution layer.

    Package on package structure and fabrication method thereof
    5.
    发明授权
    Package on package structure and fabrication method thereof 有权
    封装结构及其制造方法

    公开(公告)号:US09362217B2

    公开(公告)日:2016-06-07

    申请号:US14290145

    申请日:2014-05-29

    摘要: A method for fabricating a POP structure is disclosed. First, a first package is provided, which has: a dielectric layer; a stacked circuit layer embedded in the dielectric layer and exposed from upper and lower surfaces of the dielectric layer; a plurality of conductive posts and a semiconductor chip disposed on the upper surface of the dielectric layer and electrically connected to the stacked circuit layer; and an encapsulant formed on upper surface of the dielectric layer for encapsulating the semiconductor chip and the conductive posts and having a plurality of openings for exposing top ends of the conductive posts. Then, a second package is disposed on the encapsulant and electrically connected to the conductive posts. The formation of the conductive posts facilitates to reduce the depth of the openings of the encapsulant, thereby reducing the fabrication time and increasing the production efficiency and yield.

    摘要翻译: 公开了一种用于制造POP结构的方法。 首先,提供第一封装,其具有:介电层; 嵌入介电层中并从电介质层的上表面和下表面露出的堆叠电路层; 多个导电柱和设置在电介质层的上表面上并电连接到堆叠电路层的半导体芯片; 以及密封剂,其形成在所述电介质层的上表面上,用于封装所述半导体芯片和所述导电柱,并具有用于暴露所述导电柱的顶端的多个开口。 然后,第二包装被设置在密封剂上并电连接到导电柱。 导电柱的形成有助于减小密封剂的开口的深度,从而减少制造时间并提高生产效率和产率。

    Method of fabricating electronic package

    公开(公告)号:US10224243B2

    公开(公告)日:2019-03-05

    申请号:US15704388

    申请日:2017-09-14

    摘要: An electronic package is provided, which includes: an electronic element having an active surface with a plurality of electrode pads, an inactive surface opposite to the active surface, and a side surface adjacent to and connecting the active and inactive surfaces; a plurality of conductive elements formed on the electrode pads of the electronic element; and an encapsulant covering the active and side surfaces of the electronic element and portions of side surfaces of the conductive elements and exposing the inactive surface of the electronic element. Therefore, the invention enhances the structural strength of the active surface of the electronic element so as to prevent cracking of the electronic element and hence avoid delamination of the conductive elements from the electronic element.

    PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF
    9.
    发明申请
    PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF 有权
    包装基板及其制造方法

    公开(公告)号:US20150305162A1

    公开(公告)日:2015-10-22

    申请号:US14461828

    申请日:2014-08-18

    IPC分类号: H05K1/18 H05K3/10 H05K1/11

    摘要: A fabrication method of a packaging substrate is provided, which includes the steps of: forming first conductive portions on a carrier; sequentially forming a conductive post and an alignment layer on each of the first conductive portions; forming an encapsulant on the carrier for encapsulating the first conductive portions, the conductive posts and the alignment layers; forming a conductive via on each of the alignment layers in the encapsulant and forming second conductive portions on the conductive vias and the encapsulant; and removing the carrier. Each of the first conductive portions and the corresponding conductive post, the alignment layer and the conductive via form a conductive structure. The alignment layer has a vertical projection area larger than those of the conductive post and the conductive via to thereby reduce the size of the conductive post and the conductive via, thus increasing the wiring density and the electronic element mounting density.

    摘要翻译: 提供一种封装基板的制造方法,其包括以下步骤:在载体上形成第一导电部分; 在每个第一导电部分上依次形成导电柱和取向层; 在载体上形成密封剂,用于封装第一导电部分,导电柱和对准层; 在所述密封剂中的每个取向层上形成导电孔,并在所述导电通孔和所述密封剂上形成第二导电部分; 并移除载体。 每个第一导电部分和相应的导电柱,对准层和导电通孔形成导电结构。 取向层具有大于导电柱和导电通孔的垂直投影面积,从而减小导电柱和导电通孔的尺寸,从而增加布线密度和电子元件安装密度。

    Electronic package and method for fabricating the same

    公开(公告)号:US11114393B2

    公开(公告)日:2021-09-07

    申请号:US16534385

    申请日:2019-08-07

    摘要: An electronic package and a method for fabricating the same are provided. A plurality of electronic components are disposed in a packaging structure. At least one antenna structure is stacked via a plurality of conductive elements on the packaging structure. The antenna structure is electrically connected to at least one of the electronic components. The electronic components have different radio frequencies. In mass production, the antenna structures of different antenna types are stacked on the packaging structure, and a radio frequency product of various frequencies can be produced. Radio frequency chips of different frequencies need not be fabricated into a variety of individual packaging modules. Therefore, the production cost is reduced, and the production speed is increased.