- 专利标题: Dynamic current limit circuit
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申请号: US15255903申请日: 2016-09-02
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公开(公告)号: US09991784B2公开(公告)日: 2018-06-05
- 发明人: Mark Childs , Martin Faerber , Jens Masuch , Giulio de Vita
- 申请人: Dialog Semiconductor (UK) Limited
- 申请人地址: GB London
- 专利权人: Dialog Semiconductor (UK) Limited
- 当前专利权人: Dialog Semiconductor (UK) Limited
- 当前专利权人地址: GB London
- 代理机构: Saile Ackerman LLC
- 代理商 Stephen B. Ackerman
- 主分类号: H03M1/00
- IPC分类号: H03M1/00 ; H02M1/32 ; H02M3/158 ; H02M1/00
摘要:
A system is disclosed which provides a dynamic current limit circuit that accurately defines both the lower and the upper limits for the current limit. The circuit ensures both the lower and upper current limits are well-controlled. The lower current limit is matched to the normal pulse-frequency modulation (PFM) limit, and the upper current limit is matched to the pulse-width modulation (PWM) limit. This implementation has several key benefits, including making the peak current limit accurate in both sync and dynamic sleep modes. If the scheme is carefully designed, the dynamic sleep current limit gives the best load transient response.
公开/授权文献
- US20180069468A1 Dynamic Current Limit Circuit 公开/授权日:2018-03-08
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