Chunk redundancy architecture for memory
Abstract:
An integrated circuit (IC) includes addressable blocks of memory, and at least one redundant block of memory. A block of memory includes two or more chunks of memory. The IC also includes redundancy control cells. Control circuitry is included to access a first chunk of a redundant block of memory in place of a first remapped chunk one of the addressable blocks of memory, and a second chunk of a redundant block of memory in place of a second remapped chunk one of the addressable blocks of memory, based on the redundancy control cells.
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