Reissue Patent
- Patent Title: Dual high-K oxides with SiGe channel
- Patent Title (中): 具有SiGe通道的双高K氧化物
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Application No.: US14452736Application Date: 2014-08-06
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Publication No.: USRE45955E1Publication Date: 2016-03-29
- Inventor: Tien Ying Luo , Gauri V. Karve , Daniel K. Tekleab
- Applicant: Tien Ying Luo , Gauri V. Karve , Daniel K. Tekleab
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/10 ; H01L29/78 ; H01L29/51 ; H01L29/66 ; H01L29/49
Abstract:
A method and apparatus are described for integrating dual gate oxide (DGO) transistor devices (50, 52) and core transistor devices (51, 53) on a single substrate (15) having a silicon germanium channel layer (21) in the PMOS device areas (112, 113), where each DGO transistor device (50, 52) includes a metal gate (25), an upper gate oxide region (60, 84) formed from a second, relatively higher high-k metal oxide layer (24), and a lower gate oxide region (58, 84) formed from a first relatively lower high-k layer (22), and where each core transistor device (51, 53) includes a metal gate (25) and a core gate dielectric layer (72, 98) formed from only the second, relatively higher high-k metal oxide layer (24).
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