The present invention provides a BiCMOS integrated circuit (100) with bipolar (110), NMOS (112) and PMOS (114) transistors. In a bipolar transistor, an emitter buffer (164) is provided to minimize a hot carrier effect. The emitter buffer is implanted using the same mask used for a base link (146). However, the n-type dopant is implanted using a large angle, while the p-type dopant is implanted using a normal implant. A "base" oxide (170) is grown over the implant region. This oxide ultimate isolates the emitter buffer from the polysilicon emitter contact section (160). Local interconnects (180) are formed using a "split-poly" technique, in which a tungsten silicide cap layer (184) is formed over polysilicon to short pn junctions in the interconnect.