An integrated circuit package (10) which contains an integrated circuit (18). The internal integrated circuit is coupled to external lands (34) located on a first outer surface of the package (10) by a plurality of vias (32). The vias (32) extend through the package (10) from the first outer surface to an opposite second outer surface. The package (10) has a plurality of devices such as capacitors (28) that are mounted to the second outer surface. Some of the vias (32) are connected to a whole group of external lands (34). Grouping the lands (34) to a single via reduces the number of vias (32) on the second surface of the package (10). The reduction in vias (32) allows additional capacitors (28) to be mounted to the second surface of the package (10).