Invention Application
- Patent Title: FORMING INTERCONNECTS
- Patent Title (中): 形成互联
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Application No.: PCT/GB0004940Application Date: 2000-12-21
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Publication No.: WO0147044A2Publication Date: 2001-06-28
- Inventor: SIRRINGHAUS HENNING , FRIEND RICHARD HENRY , KAWASE TAKEO
- Applicant: PLASTIC LOGIC LTD , SIRRINGHAUS HENNING , FRIEND RICHARD HENRY , KAWASE TAKEO
- Assignee: PLASTIC LOGIC LTD,SIRRINGHAUS HENNING,FRIEND RICHARD HENRY,KAWASE TAKEO
- Current Assignee: PLASTIC LOGIC LTD,SIRRINGHAUS HENNING,FRIEND RICHARD HENRY,KAWASE TAKEO
- Priority: GB9930217 1999-12-21; GB0009917 2000-04-20
- Main IPC: H01L21/288
- IPC: H01L21/288 ; H01L21/311 ; H01L21/312 ; H01L21/336 ; H01L21/768 ; H01L27/32 ; H01L29/786 ; H01L51/00 ; H01L51/05 ; H01L51/40 ; H01L51/52
Abstract:
A method for forming an electronic device, comprising: forming a first conductive or semiconductive layer; forming a sequence of at least one insulating layer and at least one semiconducting layer over the first conductive or semiconductive layer; locally depositing solvents at a localised region of the insulating layer so as to dissolve the sequence of insulating and semiconducting layers in the region to leave a void extending through the sequence of layers; and depositing conductive or semiconductive material in the void.
Information query
IPC分类:
