Invention Application
WO2006076101A2 A METHOD TO MANUFACTURE A UNIVERSAL FOOTPRINT FOR A PACKAGE WITH EXPOSED CHIP
审中-公开
一种用于具有暴露芯片的包装的通用包装的方法
- Patent Title: A METHOD TO MANUFACTURE A UNIVERSAL FOOTPRINT FOR A PACKAGE WITH EXPOSED CHIP
- Patent Title (中): 一种用于具有暴露芯片的包装的通用包装的方法
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Application No.: PCT/US2005/044445Application Date: 2005-12-07
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Publication No.: WO2006076101A2Publication Date: 2006-07-20
- Inventor: NOQUIL, Jonathan A. , TANGPUZ, Connie , MANATAD, Romel , MARTIN, Stephen , JOSHI, Rajeev , IYER, Venkat
- Applicant: FAIRCHILD SEMICONDUCTOR CORPORATION , NOQUIL, Jonathan A. , TANGPUZ, Connie , MANATAD, Romel , MARTIN, Stephen , JOSHI, Rajeev , IYER, Venkat
- Applicant Address: 82 Running Hill Road, Ms 35-4e, South Portland, ME 04106-0022 US
- Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION,NOQUIL, Jonathan A.,TANGPUZ, Connie,MANATAD, Romel,MARTIN, Stephen,JOSHI, Rajeev,IYER, Venkat
- Current Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION,NOQUIL, Jonathan A.,TANGPUZ, Connie,MANATAD, Romel,MARTIN, Stephen,JOSHI, Rajeev,IYER, Venkat
- Current Assignee Address: 82 Running Hill Road, Ms 35-4e, South Portland, ME 04106-0022 US
- Agency: JEWIK, Patrick, R. et al.
- Priority: US11/035,918 20050113
- Main IPC: H01L23/495
- IPC: H01L23/495
Abstract:
A semiconductor die package is disclosed. It may include a semiconductor die having a first surface and a second surface, and a leadframe structure. A molding material may be formed around at least a portion of the die and at least a portion of the leadframe structure. A solderable layer may be on the exterior surface of the molding material and the first surface of the semiconductor die.
Information query
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