Invention Application
- Patent Title: CONTROLLED DEPTH ETCHED VIAS
- Patent Title (中): 控制深度蚀刻VIAS
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Application No.: PCT/US2006031846Application Date: 2006-08-16
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Publication No.: WO2007024567A2Publication Date: 2007-03-01
- Inventor: MURRY THOMAS
- Applicant: LITTON SYSTEMS INC , MURRY THOMAS
- Assignee: LITTON SYSTEMS INC,MURRY THOMAS
- Current Assignee: LITTON SYSTEMS INC,MURRY THOMAS
- Priority: US59598105 2005-08-22; US30673006 2006-01-09
- Main IPC: H05K1/11
- IPC: H05K1/11
Abstract:
A printed circuit board (20) includes a sub-assembly having dielectric (22) and conductive layers (24). A hole (26) extends into the sub-assembly. Metal plating (32) is applied on a barrel (27) of the hole (26). A conductive layer (32) and an etch resist (34) are applied to a first photoresist (30) on the hole barrel (27). The first photoresist (30) is removed and a second photoresist (36) is applied leaving areas to be controlled depth etched exposed. The exposed areas (38) are chemically etched. The second layer of photoresist (36) is removed and a second chemical etch operation is performed to define previously plated features (40) on the sub-assembly (20). The etch resist (34) is then removed.
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