Invention Application
WO2010136007A3 MEMORY ELEMENT, STACKING, MEMORY MATRIX AND METHOD FOR OPERATION
审中-公开
存储元件中,堆放,存储矩阵及其操作方法
- Patent Title: MEMORY ELEMENT, STACKING, MEMORY MATRIX AND METHOD FOR OPERATION
- Patent Title (中): 存储元件中,堆放,存储矩阵及其操作方法
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Application No.: PCT/DE2010000514Application Date: 2010-05-08
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Publication No.: WO2010136007A3Publication Date: 2011-02-24
- Inventor: LINN EIKE , KUEGELER CARSTEN , ROSEZIN ROLAND DANIEL , WASER RAINER
- Applicant: FORSCHUNGSZENTRUM JUELICH GMBH , RWTH AACHEN , LINN EIKE , KUEGELER CARSTEN , ROSEZIN ROLAND DANIEL , WASER RAINER
- Assignee: FORSCHUNGSZENTRUM JUELICH GMBH,RWTH AACHEN,LINN EIKE,KUEGELER CARSTEN,ROSEZIN ROLAND DANIEL,WASER RAINER
- Current Assignee: FORSCHUNGSZENTRUM JUELICH GMBH,RWTH AACHEN,LINN EIKE,KUEGELER CARSTEN,ROSEZIN ROLAND DANIEL,WASER RAINER
- Priority: DE102009023153 2009-05-29; EP09007199 2009-05-29; DE102009056740 2009-12-04
- Main IPC: G11C13/00
- IPC: G11C13/00 ; G11C11/56 ; G11C13/02 ; H03K19/177
Abstract:
The invention relates to a memory element, to stacking, and to a memory matrix in which said memory element can be used, to a method for operating the memory matrix, and to a method for determining the truth value of a logic operation in an array composed of the memory elements. The memory element has at least one first stable state 0 and a second stable state 1. By applying a first write voltage V0, said memory element can be transferred into the high-impedance state 0 and by applying a second write voltage V1, it can be transferred into the likewise high-impedance state 1. By applying a read voltage VR, the amount of which is smaller than the write voltages V0 and V1, the memory element exhibits different electrical resistance values. In the parasitic current paths occurring in a memory matrix, the memory element acts as a high-impedance resistor, without in principle being limited to unipolar switching. A method has been developed, with which an array composed of the memory elements according to the invention can be turned into a gate for arbitrary logic operations.
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