Invention Application
- Patent Title: SOLDER IN CAVITY INTERCONNECTION STRUCTURES
- Patent Title (中): 焊接在CAVITY互连结构中
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Application No.: PCT/US2012/029617Application Date: 2012-03-19
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Publication No.: WO2012129153A2Publication Date: 2012-09-27
- Inventor: HU, Chuan , LIFF, Shawna M. , CLEMONS, Gregory S.
- Applicant: INTEL CORPORATION , HU, Chuan , LIFF, Shawna M. , CLEMONS, Gregory S.
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95052 US
- Assignee: INTEL CORPORATION,HU, Chuan,LIFF, Shawna M.,CLEMONS, Gregory S.
- Current Assignee: INTEL CORPORATION,HU, Chuan,LIFF, Shawna M.,CLEMONS, Gregory S.
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95052 US
- Agency: WINKLE, Robert G. et al.
- Priority: US13/069,601 20110323
- Main IPC: H01L23/488
- IPC: H01L23/488 ; H01L21/60
Abstract:
The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first substrate to maintain separation between soldered interconnections. In one embodiment, the cavities may have sloped sidewalls. In another embodiment, a solder paste may be deposited in the cavities and upon heating solder structures may be formed. In other embodiments, the solder structures may be placed in the cavities or may be formed on a second substrate to which the first substrate may be connected. In still other embodiments, solder structures may be formed on both the first substrate and a second substrate. The solder structures may be used to form solder interconnects by contact and reflow with either contact lands or solder structures on a second substrate.
Information query
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