摘要:
A device package and a method of forming the device package are described. The device package includes one or more dies disposed on a first substrate. The device packages further includes one or more interconnects vertically disposed on the first substrate, and a mold layer disposed over and around the first die, the one or more interconnects, and the first substrate. The device package has a second die disposed on a second substrate, wherein the first substrate is electrically coupled to the second substrate with the one or more interconnects, and wherein the one or more interconnects are directly disposed on at least one of a top surface of the first substrate and a bottom surface of the second substrate without an adhesive layer. The device package may include one or more interconnects having one or more different thicknesses or heights at different locations on the first substrate.
摘要:
Embodiments of the invention include an active venting system. According to an embodiment of the invention, the active venting system may include a substrate having one or more seams formed through the substrate. In order to open the vents defined by the seams through the substrate, a piezoelectric layer may be formed proximate to one or more of the seams. Additional embodiments may include a first electrode and a second electrode that contact the piezoelectric layer in order to provide a voltage differential across the piezoelectric layer. In an embodiment the active venting system may be integrated into a garment. In such an embodiment, the garment may also include an electronics module for controlling the actuators. Additionally, conductive traces may be printed on the garment or sewn into the garment to provide electrical connections from the electronics module to each of the piezoelectric actuators.
摘要:
Heat management systems for vertical cavity surface emitting laser (VCSEL) chips are provided. Embodiments of the invention provide substrates having a vertical cavity surface emitting laser chip disposed on the substrate surface and electrically interconnected with the substrate, a thermal frame disposed on the substrate surface and proximate to at least three sides of the vertical cavity surface emitting laser chip, and a thermal interface material disposed between the at least three sides of the vertical cavity surface emitting laser chip and the thermal frame. The substrate can also include a transceiver chip that is operably coupled to a further integrated circuit chip and that is capable of driving the VCSEL chip.
摘要:
A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.
摘要:
The present disclosure relates to the field of fabricating microelectronic packages, wherein cavities are formed in a dielectric layer deposited on a first substrate to maintain separation between soldered interconnections. In one embodiment, the cavities may have sloped sidewalls. In another embodiment, a solder paste may be deposited in the cavities and upon heating solder structures may be formed. In other embodiments, the solder structures may be placed in the cavities or may be formed on a second substrate to which the first substrate may be connected. In still other embodiments, solder structures may be formed on both the first substrate and a second substrate. The solder structures may be used to form solder interconnects by contact and reflow with either contact lands or solder structures on a second substrate.
摘要:
Embodiments of the invention include an optoelectronic package that allows for in situ alignment of optical fibers. In an embodiment, the optoelectronic package may include an organic substrate. Embodiments include a cavity formed into the organic substrate. Additionally, the optoelectronic package may include an actuator formed on the organic substrate that extends over the cavity. In one embodiment, the actuator may include a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer. According to an additional embodiment of the invention, the actuator may include a first portion and a second portion. In order to allow for resistive heating and actuation driven by thermal expansion, a cross-sectional area of the first portion of the beam may be greater than a cross-sectional area of the second portion of the beam.
摘要:
Flexible electronically functional fabrics are described that allow for the placement of electronic functionality in flexible substrates such as traditional fabrics. The fabrics can be made using flexible electronically functional fibers or a combination of electronically functional fibers and textile fibers. Electronic devices can be incorporated into the fabric to give it full computing capabilities.
摘要:
Flexible electronically functional fibers are described that allow for the placement of electronic functionality in traditional fabrics. The fibers can be interwoven with natural fibers to produce electrically functional fabrics and devices that can retain their original appearance.
摘要:
A method of dispersing particles in a medium. The method includes providing a first particle/solvent dispersion comprising the particles and a first solvent, adding a second solvent to the first particle/solvent dispersion to form a second particle/solvent dispersion, wherein the first solvent and the second solvent are miscible, and extracting substantially all of the first solvent from the second particle/solvent dispersion to form a third particle/solvent dispersion.
摘要:
Ultra-thin, hyper-density semiconductor packages and techniques of forming such packages are described. An exemplary semiconductor package is formed with one or more of: (i) metal pillars having an ultra fine pitch (e.g., a pitch that is greater than or equal to 150 µm, etc.); (ii) a large die to-package ratio (e.g., a ratio that is equal to or greater than 0.85, etc.); and (iii) a thin pitch translation interposer. Another exemplary semiconductor package is formed using coreless substrate technology, die back metallization, and low temperature solder technology for ball grid array (BGA) metallurgy. Other embodiments are described.