Invention Application
WO2013052322A3 STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS
审中-公开
使用不带WINDOWS的WIREBOND组件的终端设备的最小化
- Patent Title: STUB MINIMIZATION USING DUPLICATE SETS OF TERMINALS FOR WIREBOND ASSEMBLIES WITHOUT WINDOWS
- Patent Title (中): 使用不带WINDOWS的WIREBOND组件的终端设备的最小化
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Application No.: PCT/US2012057179Application Date: 2012-09-26
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Publication No.: WO2013052322A3Publication Date: 2013-06-20
- Inventor: CRISP RICHARD DEWITT , ZOHNI WAEL , HABA BELGACEM , LAMBRECHT FRANK
- Applicant: INVENSAS CORP
- Assignee: INVENSAS CORP
- Current Assignee: INVENSAS CORP
- Priority: US201261600527 2012-02-17; US201161542553 2011-10-03
- Main IPC: H01L25/065
- IPC: H01L25/065 ; G11C5/02 ; G11C5/06 ; H01L23/13 ; H01L23/49 ; H01L25/10
Abstract:
A microelectronic element (101) having memory storage array function has a front face (105) facing away from a substrate (102) of a microelectronic package (100), and is electrically connected with the substrate (102) through conductive structure (112) extending above the front face (105). First and second sets (114, 124) of first terminals are exposed at a surface (110) of the substrate (102) on respective first and second sides of a theoretical axis (132), each set configured to carry address information usable to determine an addressable memory location of a memory storage array of the microelectronic element. Signal assignments of the first terminals in the first set are a mirror image of the signal assignments of the first terminals in the second set.
Information query
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