Invention Application
- Patent Title: REAL TIME INSTRUCTION TRACING COMPRESSION OF RET INSTRUCTIONS
- Patent Title (中): 实时指令跟踪RET指令的压缩
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Application No.: PCT/US2011/068287Application Date: 2011-12-31
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Publication No.: WO2013101251A1Publication Date: 2013-07-04
- Inventor: BRANDT, Jason , TYLER, Jonathan , ZURAWSKI, John , LASTOR, Dennis
- Applicant: INTEL CORPORATION , BRANDT, Jason , TYLER, Jonathan , ZURAWSKI, John , LASTOR, Dennis
- Applicant Address: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95052 US
- Assignee: INTEL CORPORATION,BRANDT, Jason,TYLER, Jonathan,ZURAWSKI, John,LASTOR, Dennis
- Current Assignee: INTEL CORPORATION,BRANDT, Jason,TYLER, Jonathan,ZURAWSKI, John,LASTOR, Dennis
- Current Assignee Address: 2200 Mission College Boulevard MS: RNB-4-150 Santa Clara, California 95052 US
- Agency: HUNTER, Spencer K. et al.
- Main IPC: G06F9/06
- IPC: G06F9/06 ; G06F9/30
Abstract:
In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing Real Time Instruction Tracing compression of RET instructions For example, in one embodiment, such means may include an integrated circuit having means for initiating instruction tracing for instructions of a traced application, mode, or code region, as the instructions are executed by the integrated circuit; means for generating a plurality of packets describing the instruction tracing; and means for compressing a multi-bit RET instruction (RETurn instruction) to a single bit RET instruction.
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