Invention Application
- Patent Title: METHODS OF FORMING UNDER DEVICE INTERCONNECT STRUCTURES
- Patent Title (中): 在设备互连结构下形成的方法
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Application No.: PCT/US2014/025562Application Date: 2014-03-13
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Publication No.: WO2014159980A2Publication Date: 2014-10-02
- Inventor: NELSON, Don , WEBB, Clair M. , JUN, Kimin , SON, Il-Seok
- Applicant: INTEL CORPORATION , MORROW, Patrick , NELSON, Don , WEBB, Clair M. , JUN, Kimin , SON, Il-Seok
- Applicant Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Assignee: INTEL CORPORATION,MORROW, Patrick,NELSON, Don,WEBB, Clair M.,JUN, Kimin,SON, Il-Seok
- Current Assignee: INTEL CORPORATION,MORROW, Patrick,NELSON, Don,WEBB, Clair M.,JUN, Kimin,SON, Il-Seok
- Current Assignee Address: 2200 Mission College Boulevard Santa Clara, California 95054 US
- Agency: ORTIZ, Kathy J.
- Priority: US13/798,575 20130313
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/12
Abstract:
Methods of forming microelectronic interconnect under device structures are described. Those methods and structures may include forming a device layer in a first substrate, forming at least one routing layer in a second substrate, and then coupling the first substrate with the second substrate, wherein the first substrate is bonded to the second substrate.
Information query
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