Invention Application
- Patent Title: A MULTILEVEL MEMORY STACK STRUCTURE AND METHODS OF MANUFACTURING THE SAME
- Patent Title (中): 多个存储堆栈结构及其制造方法
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Application No.: PCT/US2015/015155Application Date: 2015-02-10
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Publication No.: WO2015126664A1Publication Date: 2015-08-27
- Inventor: PACHAMUTHU, Jayavel , ALSMEIER, Johann , CHIEN, Henry
- Applicant: SANDISK TECHNOLOGIES, INC.
- Applicant Address: Two Legacy Town Center 6900 North Dallas Parkway Plano, Texas 75024 US
- Assignee: SANDISK TECHNOLOGIES, INC.
- Current Assignee: SANDISK TECHNOLOGIES, INC.
- Current Assignee Address: Two Legacy Town Center 6900 North Dallas Parkway Plano, Texas 75024 US
- Agency: RADOMSKY, Leon et al.
- Priority: US61/942,539 20140220; US14/611,785 20150202
- Main IPC: H01L27/115
- IPC: H01L27/115
Abstract:
A first stack of alternating layers including first electrically conductive layers and first electrically insulating layers is formed with first stepped surfaces and a first dielectric material portion thereupon. Dielectric pillar structures including a dielectric metal oxide can be formed through the first stepped surfaces. Lower memory openings can be formed, and filled with a disposable material or a lower memory opening structure including a lower semiconductor channel and a doped semiconductor region. At least one dielectric material layer and a second stack of alternating layers including second electrically conductive layers and second electrically insulating layers can be sequentially formed. Upper memory openings can be formed through the second stack and the at least one dielectric material layer. A memory film and a semiconductor channel can be formed after removal of the disposable material, or an upper semiconductor channel can be formed on the doped semiconductor region.
Information query
IPC分类: